RT8059 ? ds8059-04 december 2011 www.richtek.com copyright 2011 richtek technology corporation. all rights reserved. is a registered trademark of ric htek technology corporation. ? 1 features z z z z z wide input voltage from 2.8v to 5.5v z z z z z adjustable output from 0.6v to v in z z z z z 1a output current z z z z z 95% efficiency z z z z z no schottky diode required z z z z z 1.5mhz fixed frequency pwm operation z z z z z small tsot-23-5 package z z z z z rohs compliant and halogen free applications z nic card z cellular telephones z personal information appliances z wireless and dsl modems z mp3 players z portable instruments 1.5mhz, 1a, high efficiency pwm step-down dc/dc converter general description the RT8059 is a high efficiency pulse width modulated (pwm) step-down dc/dc converter, capable of delivering 1a output current over a wide input voltage range from 2.8v to 5.5v. the RT8059 is ideally suited for portable electronic devices that are powered by 1-cell li-ion battery or by other power sources within the range, such as cellular phones, pdas and handy-terminals. internal synchronous rectifier with low r ds(on) dramatically reduces conduction loss at pwm mode. no external schottky diode is required in practical applications. the RT8059 automatically turns off the synchronous rectifier when the inductor current is low and enters discontinuous pwm mode. this can increase efficiency in light load condition. the RT8059 enters low dropout mode when normal pwm cannot provide regulated output voltage by continuously turning on the upper p-mosfet. the RT8059 enters shutdown mode and consumes less than 0.1 a when the en pin is pulled low. the switching ripple can be easily smoothed out by small package filtering elements due to a fixed operation frequency of 1.5mhz. this along with small tsot-23-5 package provides small pcb area application. other features include soft-start, lower internal reference voltage with 2% accuracy, over temperature protection, and over current protection. ordering information pin configurations (top view) tsot-23-5 note : richtek products are : ` rohs compliant and compatible with the current require- ments of ipc/jedec j-std-020. ` suitable for use in snpb or pb-free soldering processes. en gnd lx fb vin 4 23 5 bq= : product code dnn : date code marking information bq=dnn RT8059 package type j5 : tsot-23-5 lead plating system g : green (halogen free and pb free)
RT8059 2 ds8059-04 december 2011 www.richtek.com copyright 2011 richtek technology corporation. all rights reserved. is a registered trademark of ric htek technology corporation. ? typical application circuit ? ? ? ? ? ? + = r2 r1 1 x v v ref out with r2 = 60k to 300k , i r2 = 2 a to 10 a, and (r1 x c1) should be in the range between 3x10 ? 6 and 6x10 ? 6 for component selection. functional pin description pin no. pin name pin function 1 en chip enable (active high). do not leave the en pin floating. 2 gnd ground. 3 lx switch node. 4 vin power input. 5 fb feedback input pin. function block diagram 4.7f 10f vin lx gnd RT8059 en fb 2.2h 2.8v to 5.5v v in v out c in l 5 3 4 1 2 c out r1 r2 c1 i r2 comp rc r s1 r s2 en vin lx fb uvlo v ref slope compensation current sense osc & shutdown control zero detector current limit detector driver control logic gnd error amplifier pwm comparator
RT8059 3 ds8059-04 december 2011 www.richtek.com copyright 2011 richtek technology corporation. all rights reserved. is a registered trademark of ric htek technology corporation. ? absolute maximum ratings (note 1) z vin to gnd -------------------------------------------------------------------------------------------------------- 6.5v z lx pin switch voltage ------------------------------------------------------------------------------------------ ? 0.3v to (pvdd + 0.3v) < 30ns -------------------------------------------------------------------------------------------------------------- ? 5v to 7.5v z en, fb to gnd --------------------------------------------------------------------------------------------------- v in + 0.6v z power dissipation, p d @ t a = 25 c tsot-23-5 --------------------------------------------------------------------------------------------------------- 0.392w z package thermal resistance (note 2) tsot-23-5, ja --------------------------------------------------------------------------------------------------- 255 c/w z junction temperature range ---------------------------------------------------------------------------------- 150 c z lead temperature (soldering, 10 sec.) --------------------------------------------------------------------- 260 c z storage temperature range ----------------------------------------------------------------------------------- ? 65 c to 150 c z esd susceptibility (note 3) hbm (human body mode) ------------------------------------------------------------------------------------- 2kv mm (machine mode) -------------------------------------------------------------------------------------------- 200v electrical characteristics (v in = 3.6v, v out = 2.5v, l = 2.2 h, c in = 4.7 f, c out = 10 f, t a = 25 c, unless otherwise specified) recommended operating conditions (note 4) z supply input voltage, v in -------------------------------------------------------------------------------------- 2.8v to 5.5v z junction temperature range ---------------------------------------------------------------------------------- ? 40 c to 125 c z ambient temperature range ---------------------------------------------------------------------------------- ? 40 c to 85 c parameter symbol test conditions min typ max unit quiescent current i q i out = 0ma, v fb = v ref + 5% -- 78 -- a shutdown current i sh dn en = gnd -- 0.1 1 a reference voltage v ref 0.588 0.6 0.612 v adjustable output range v out (note 5) v ref -- v in ? 0.2 v adjustable output voltage accuracy v out v in = v out + v to 5.5v, 0a < i out < 1a, (note 6) ? 3 -- 3 % fb input current i fb v fb = v in ? 50 -- 50 na p-mosfet r on r ds(on)_p i out = 200ma -- 0.28 -- n-mosfet r on r ds(on)_n i out = 200ma -- 0.25 -- p-channel current limit i lm_p v in = 2.8v to 5.5v -- 1.5 -- a logic-high v ih v in = 2.8v to 5.5v 1.5 -- -- en input threshold voltag e logic-low v il v in = 2.8v to 5.5v -- -- 0.4 v under voltage lockout threshold v uvlo -- 2.3 -- v under voltage lockout hysteresis v uvlo -- 0.2 -- v oscillator frequency f osc i out = 100ma 1.2 1.5 1.8 mhz thermal shutdown temperature t sd -- 150 -- c max. duty cycle d max 100 -- -- %
RT8059 4 ds8059-04 december 2011 www.richtek.com copyright 2011 richtek technology corporation. all rights reserved. is a registered trademark of ric htek technology corporation. ? note 1. stresses beyond those listed ? absolute maximum ratings ? may cause permanent damage to the device. these are stress ratings only, and functional operation of the device at these or any other conditions beyond those indicated in the operational sections of the specifications is not implied. exposure to absolute maximum rating conditions may affect device reliability. note 2. ja is measured at t a = 25 c on a low effective thermal conductivity single-layer test board per jedec 51-3. note 3. devices are esd sensitive. handling precaution recommended. note 4. the device is not guaranteed to function outside its operating conditions. note 5. guaranteed by design. note 6. v = i out x r ds(on)
RT8059 5 ds8059-04 december 2011 www.richtek.com copyright 2011 richtek technology corporation. all rights reserved. is a registered trademark of ric htek technology corporation. ? typical operating characteristics current limit vs. temperature 0.5 0.7 0.9 1.1 1.3 1.5 1.7 1.9 2.1 -50 -25 0 25 50 75 100 125 temperature (c) current limit (a) v in = 3.3v, v out = 1.2v reference voltage vs. temperature 0.580 0.585 0.590 0.595 0.600 0.605 0.610 0.615 0.620 -50 -25 0 25 50 75 100 125 temperature (c) reference voltage (v) v in = 3.3v, i out = 0.1a frequency vs. temperature 1.20 1.25 1.30 1.35 1.40 1.45 1.50 1.55 1.60 1.65 1.70 -50-250 255075100125 temperature (c) frequency (mhz) 1 v in = 3.3v, v out = 1.2v, i out = 0.3a reference voltage vs. input voltage 0.580 0.585 0.590 0.595 0.600 0.605 0.610 0.615 0.620 2.5 3 3.5 4 4.5 5 5.5 input voltage (v) reference voltage (v) i out = 0.1a output voltage vs. output current 1.180 1.185 1.190 1.195 1.200 1.205 1.210 1.215 1.220 1.225 1.230 0 0.1 0.2 0.3 0.4 0.5 0.6 0.7 0.8 0.9 1 output current (a) output voltage (v) v in = 3.3v 0 10 20 30 40 50 60 70 80 90 100 0.01 0.1 1 load current (a) efficiency (%) efficiency vs. load current v in = 3.3v, v out = 2.5v v in = 5.5v, v out = 2.5v v in = 3.3v, v out = 1.2v v in = 5.5v, v out = 1.2v
RT8059 6 ds8059-04 december 2011 www.richtek.com copyright 2011 richtek technology corporation. all rights reserved. is a registered trademark of ric htek technology corporation. ? load transient response time (100 s/div) v in = 3.3v, v out = 1.2v, i out = 0.5a to 1a v out (50mv/div) i out (500ma/div) load transient response time (100 s/div) v out (50mv/div) i out (500ma/div) v in = 3.3v, v out = 1.2v, i out = 0.1a to 1a switching time (250ns/div) i out (1a/div) v lx (2v/div) v out (5mv/div) v in = 3.3v, v out = 1.2v, i out = 1a power on from en time (500 s/div) i out (1a/div) v en (2v/div) v out (500mv/div) v in = 3.3v, v out = 1.2v, i out = 1a power off from en time (500 s/div) v in = 3.3v, v out = 1.2v, i out = 1a i out (1a/div) v en (2v/div) v out (500mv/div) switching time (250ns/div) v in = 3.3v, v out = 1.2v, i out = 0.5a i out (1a/div) v lx (2v/div) v out (5mv/div)
RT8059 7 ds8059-04 december 2011 www.richtek.com copyright 2011 richtek technology corporation. all rights reserved. is a registered trademark of ric htek technology corporation. ? applications information the basic RT8059 application circuit is shown in typical application circuit. external component selection is determined by the maximum load current and begins with the selection of the inductor value and operating frequency followed by c in and c out . inductor selection for a given input and output voltage, the inductor value and operating frequency determine the ripple current. the ripple current i l increases with higher v in and decreases with higher inductance. having a lower ripple current reduces the esr losses in the output capacitors and the output voltage ripple. highest efficiency operation is achieved at low frequency with small ripple current. this, however, requires a large inductor. a reasonable starting point for selecting the ripple current is i l = 0.4(i max ). the largest ripple current occurs at the highest v in . to guarantee that the ripple current stays below a specified maximum, the inductor value should be chosen according to the following equation : inductor core selection once the value for l is known, the type of inductor can be selected. high efficiency converters generally cannot afford the core loss found in low cost powdered iron cores, forcing the use of more expensive ferrite or mollypermalloy cores. actual core loss is independent of core size for a fixed inductor value but it is very dependent on the inductance selected. as the inductance increases, core losses decrease. unfortunately, increased inductance requires more turns of wire and therefore, results in higher copper losses. ferrite designs have very low core losses and are preferred at high switching frequencies, so design goals can concentrate on copper loss and preventing saturation. ferrite core material saturates ? hard ? , which means that inductance collapses abruptly when the peak design ? ? ? ? ? ? ? ? ? ? ? ? ? = in out out l v v 1 l f v i ? ? ? ? ? ? ? ? ? ? ? ? ? = in(max) out l(max) out v v 1 i f v l current is exceeded. this results in an abrupt increase in inductor ripple current and consequent output voltage ripple. do not allow the core to saturate! different core materials and shapes will change the size/ current and price/current relationship of an inductor. toroid or shielded pot cores in ferrite or permalloy materials are small and don't radiate energy but generally cost more than powdered iron core inductors with similar characteristics. the choice of which style inductor to use mainly depends on the price vs size requirements and any radiated field/emi requirements. c in and c out selection the input capacitance, c in , is needed to filter the trapezoidal current at the source of the top mosfet. to prevent large ripple voltage, a low esr input capacitor sized for the maximum rms current should be used. rms current is given by : ? ? ? ? ? ? + out l out 8fc 1 esr i v 1 v v v v i i out in in out out(max) rms ? = this formula has a maximum at v in = 2v out , where i rms = i out /2. this simple worst-case condition is commonly used for design because even significant deviations do not result in much difference. note that ripple current ratings from capacitor manufacturers are often based on only 2000 hours of life which makes it advisable to further derate the capacitor, or choose a capacitor rated at a higher temperature than required. several capacitors may also be paralleled to meet size or height requirements in the design. the selection of c out is determined by the effective series resistance (esr) that is required to minimize voltage ripple and load step transients, as well as the amount of bulk capacitance that is necessary to ensure that the control loop is stable. loop stability can be checked by viewing the load transient response as described in a later section. the output ripple, v out , is determined by : where f is the switching frequency and i l is the inductor ripple current.
RT8059 8 ds8059-04 december 2011 www.richtek.com copyright 2011 richtek technology corporation. all rights reserved. is a registered trademark of ric htek technology corporation. ? the output ripple is highest at maximum input voltage since i l increases with input voltage. multiple capacitors placed in parallel may be needed to meet the esr and rms current handling requirements. dry tantalum, special polymer, aluminum electrolytic and ceramic capacitors are all available in surface mount packages. special polymer capacitors offer very low esr but have lower capacitance density than other types. tantalum capacitors have the highest capacitance density but it is important to only use types that have been surge tested for use in switching power supplies. aluminum electrolytic capacitors have significantly higher esr but can be used in cost-sensitive applications provided that consideration is given to ripple current ratings and long term reliability. ceramic capacitors have excellent low esr characteristics but can have a high voltage coefficient and audible piezoelectric effects. the high q of ceramic capacitors with trace inductance can also lead to significant ringing. using ceramic input and output capacitors higher values, lower cost ceramic capacitors are now becoming available in smaller case sizes. their high ripple current, high voltage rating and low esr make them ideal for switching regulator applications. however, care must be taken when these capacitors are used at the input and output. when a ceramic capacitor is used at the input and the power is supplied by a wall adapter through long wires, a load step at the output can induce ringing at the input, v in . at best, this ringing can couple to the output and be mistaken as loop instability. at worst, a sudden inrush of current through the long wires can potentially cause a voltage spike at v in large enough to damage the part. output voltage setting the resistive voltage divider allows the fb pin to sense a fraction of the output voltage as shown in figure 1. RT8059 gnd fb r1 r2 v out figure 1. setting output voltage ) r2 r1 (1 v v ref out + = for adjustable voltage mode, the output voltage is set by an external resistive voltage divider according to the following equation : where v ref is the internal reference voltage (0.6v typ.) checking transient response the regulator loop response can be checked by looking at the load transient response. switching regulators take several cycles to respond to a step in load current. when a load step occurs, v out immediately shifts by an amount equal to i load (esr), where esr is the effective series resistance of c out . i load also begins to charge or discharge c out generating a feedback error signal used by the regulator to return v out to its steady-state value. during this recovery time, v out can be monitored for overshoot or ringing which would indicate a stability problem. thermal considerations for continuous operation, do not exceed absolute maximum junction temperature. the maximum power dissipation depends on the thermal resistance of the ic package, pcb layout, rate of surrounding airflow, and difference between junction and ambient temperature. the maximum power dissipation can be calculated by the following formula : p d(max) = (t j(max) ? t a ) / ja where t j(max) is the maximum junction temperature, t a is the ambient temperature, and ja is the junction to ambient thermal resistance. for recommended operating condition specifications of the RT8059, the maximum junction temperature is 125 c and t a is the ambient temperature. the junction to ambient thermal resistance, ja , is layout dependent. for tsot- 23-5 packages, the thermal resistance, ja , is 255 c /w on a standard jedec 51-3 single-layer thermal test board. the maximum power dissipation at t a = 25 c can be calculated by the following formula : p d(max) = (125 c ? 25 c ) / (255 c /w) = 0.392w for tsot-23-5 package
RT8059 9 ds8059-04 december 2011 www.richtek.com copyright 2011 richtek technology corporation. all rights reserved. is a registered trademark of ric htek technology corporation. ? figure 2. derating curves for RT8059 package the maximum power dissipation depends on the operating ambient temperature for fixed t j(max) and thermal resistance, ja . for the RT8059 package, the derating curves in figure 2 allow the designer to see the effect of rising ambient temperature on the maximum power dissipation. layout considerations follow the pcb layout guidelines for optimal performance of the RT8059. ` keep the trace of the main current paths as short and wide as possible. ` place the input capacitor as close as possible to the device pins (vin and gnd). ` lx node experiences high frequency voltage swings and should be kept in a small area. keep analog components away from the lx node to prevent stray capacitive noise pick-up. ` place the feedback components as close as possible to the fb pin. ` gnd and exposed pad must be connected to a strong ground plane for heat sinking and noise protection. en gnd lx fb 2 3 5 4 1 vin gnd v in v out c out c in gnd c1 r1 r2 l v out figure 3. pcb layout guide 0.00 0.03 0.06 0.09 0.12 0.15 0.18 0.21 0.24 0.27 0.30 0.33 0.36 0.39 0.42 0255075100125 ambient temperature (c) maximum power dissipation (w) 1 single-layer pcb
RT8059 10 ds8059-04 december 2011 www.richtek.com richtek technology corporation 5f, no. 20, taiyuen street, chupei city hsinchu, taiwan, r.o.c. tel: (8863)5526789 richtek products are sold by description only. richtek reserves the right to change the circuitry and/or specifications without notice at any time. customers should obtain the latest relevant information and data sheets before placing orders and should verify that such information is current and complete. richtek cannot assume responsibility for use of any circuitry other than ci rcuitry entirely embodied in a richtek product. information furnish ed by richtek is believed to be accurate and reliable. however, no respon sibility is assumed by richtek or its subsidiaries for its use; nor for any infringeme nts of patents or other rights of third parties which may result from its use. no license is granted by implication or otherwise under any patent or patent rights of r ichtek or its subsidiaries. tsot-23-5 surface mount package dimensions in millimeters dimensions in inches symbol min max min max a 0.700 1.000 0.028 0.039 a1 0.000 0.100 0.000 0.004 b 1.397 1.803 0.055 0.071 b 0.300 0.559 0.012 0.022 c 2.591 3.000 0.102 0.118 d 2.692 3.099 0.106 0.122 e 0.838 1.041 0.033 0.041 h 0.080 0.254 0.003 0.010 l 0.300 0.610 0.012 0.024 a a1 e b b d c h l outline dimension
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